HECOSIM Project Website
Objectives

HeCoSim: Heterogeneous co-simulation & Hybrid simulation of Systems
Simulate and validate heterogeneous virtual platforms of automotive industrial use case, following two different approaches the co-simulation and the global simulation, on the base of existing tools and of generated critical scenarii.
Contact us: http://forum.projet-hecosim.org/
Projects plans & deliverables
The current challenge for the automotive industry is to control the complexity and to validate the integration of heterogeneous systems in their environment. The project will provide the simulation tools to reinforce and to validate the automotive architecture choices .
WP. 0: "Project management, exhibition"
WP. 1: "RT-Builder: Training on the heterogeneous discrete co-simulation"
WP. 2: "Extend the reference platform to the heterogeneous discrete simulation through RT-Builder (GEENSYS), UNISIM (CEA-LIST), Matlab/Simulink (The MathWorks), StateMate (Telelogic) and SystemVision (VHDL-AMS language, Mentor Graphics) tools"
WP. 3: "Extend AGATHA to the heterogeneous hybrid simulation and create an exhaustive scenario generator with a critical scenario filter"
WP. 4: "Validate and benchmark the different solutions on industrial use cases"
HeCoSim Official Document (in french) : HECOSIM_ANRsite.pdf
Major phases of the projects

Illustrations

Project Tools
RT-Builder
RT-Builder is a product dedicated to modelization, simulation and validation of dynamic real-time architectures with mono-calculators or multi-calculators and multi-Bus (distributed architecture). With RT-Builder, users can model and manage interactions between control and data functions, but also concurrency, multi-tasking, preemptive actions, shared resources, event routing and filtering, FIFO buffers, etc. The description of real-time architectures is done with the aid of specific libraries (Basic preemptible RTOS, OSEK RTOS, CAN bus, etc.). So the user has the possibility to model only one ECU or design all its architecture.
With simulation and debugging, users have access to advanced calculation capabilities (CPU load, Bus load, point-to-point data propagation time, etc). With RT-Builder, users have also the possibility to import and simulate, on the previous designed real-time architecture, the applications functional behaviour. This importation is done by an importation of generated C code or legacy one. For simulation and validation, RT-Builder integrates an event-driven simulator associated with a standard debugger. An interface with Requirements Traceability is also available, as the support of automatic documentation.
StateMate
Statemate is the most comprehensive graphical modeling and simulation tool for the rapid development of complex embedded systems. Using a combination of traditional graphical design notations combined with some of the Unified Modeling Language (UML) diagrams, Statemate provides a direct and formal link between user requirements and software implementation by allowing the user to create a complete, executable specification. Operating on an engineering workstation or PC, Statemate creates a visual, graphical specification that clearly and precisely represents the intended functions and behavior of the system being specified.
This specification may be executed, or graphically simulated, so the system engineer can explore what-if scenarios to determine if the behavior and the interactions between system elements are correct. These scenarios can be captured and included in Test Plans which are later run on the embedded system to ensure that what gets built meets what was specified. This executable specification is also used to communicate with the customer or end user to confirm that the specification meets their requirements.
Complete systems are specified using Statemate so that costly errors due to ambiguous requirements can be found and corrected early in the design process. Statemate allows systems engineers to conquer today's design challenges by providing an iterative and complete graphical design environment. Our customers tell us that they save over 30% in development costs by using Statemate.
Matlab/Simulink
Simulink is a platform for multidomain simulation and Model-Based Design for dynamic systems. It provides an interactive graphical environment and a customizable set of block libraries, and can be extended for specialized applications.
Add-on products extend the Simulink environment with tools for specific modeling and design tasks and for code generation, algorithm implementation, test, and verification.
Simulink is integrated with MATLAB, providing immediate access to an extensive range of tools for algorithm development, data visualization, data analysis and access, and numerical computation.
UNISIM
Simulation is a solution to the test needs of both microprocessors and software running on microprocessors. A silicon implementation of these microprocessors is usually not available before the end of the architecture design flow, essentially for cost reasons. The sooner these simulation models are available, the sooner the compilers, the operating system and the applications can be designed while meeting a good integration with the architecture.
Actually, simulation is the core of research in micro-architecture since it allows evaluating new techniques in various contexts, and gives a better understanding of their properties. Simulation is also a convenient technique to debug software where a hardware prototype is not yet available. The capabilities of simulation platforms to inject faults into the simulated system and to easily observe the system behavior are also useful during hardware and software integration process.
Since a couple of years, SystemC has emerged as a defacto standard for simulating systems on chip (SoC) and embedded processors. The main assets of SystemC are the modular structure of simulators which facilitates components reuse and sharing, its ability to combine cycle level and transactional level modeling, and now its large use by the community.
UNISIM is a joint open source initiative of CEA List, INRIA Futurs and Princeton University to develop a complete simulation environment based on SystemC.
UNISIM brings: (1) A methodology for developing the hardware models; (2) A library of hardware models; (3) Several tools to facilitate hardware model development/debugging/exploitation.
It is freely available on the web at www.unisim.org and through subversion at https://www.unisim.org/svn (use "guest" as login and no passworg).
It is the common simulation platform of the HiPEAC European Network of Excelence. University of Perpignan, Polytechnical University of Catalunya, Barcelona Supercomputing Center, Brigham Young University and University of Ghent have joined the initiative. The simulation environment is being evaluated by EADS/MBDA, NXP, ARM, and STMicroelectronics.
AGATHA
The AGATHA toolset is developed at CEA. Its objective is to provide tools to efficiently support engineers during the design and validation process of heterogeneous and hybrid systems.
The approach chosen consists in using structural test generation techniques in order to provide an early feedback on system’s behaviour supported by visual facilities. Starting from VHDL-AMS, MatLab/Simulink or Statemate (STATECHARTS) specifications, AGATHA produces a symbolic execution tree whose path conditions are used to generate test.
This tree can also be analysed and explored by the engineer thanks to various interactive facilities so that he can incrementally build and validate systems specifications. It is possible, in spite of the state space explosion problem, because AGATHA integrates in an original way advanced formal computation techniques (symbolic execution, parallel composition of automata, constraints solving, etc.) that together participate to eliminate redundant calculus or useless paths.
SystemVision (VHDL-AMS)
SystemVision bridges the gap between high-level system modeling and component-level circuit prototyping. This rich, flexible modeling technology provides the perfect environment for verifying your design ideas and exploring implementation options.
SystemVision Professional is a full capacity commercial product for the electrical engineer who deals with the problem of complex system integration.
Business Model

Status & Achievements
- Kick off in January 2007
- Web site: http://www.projet-hecosim.org/
- Forum site: http://forum.projet-hecosim.org/
- The partner Geensys is a merge of TNI-Software and Ayrton Technology
- CosiMate tool replaced by RT-Builder tool
- RT-Builder supports by default the asynchronuous event simulation (co-simulation: Statemate with MatLab/Simulink)
- CosiMate in open source on Eclipse stopped, RT-builder will be not in open source
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Sockets (alpha version) for the co-simulation between RT-Builder and tools: MatLab/Simulink, Statemate, SystemVision are available
Coordinator: Valeo
Partners: Valeo, GEENSYS, CEA-LIST, UTC (CNRS) - HEUDIASYC
Durations: 3 Years
Global budget: 2,67 M€
Funding: 1,27M€ from ANR/ RNTL
Contact:
BISSON Jean-François
VALEO – CEE
+33 (0)1 48 98 84 54
Jean-francois.bisson@valeo.com